Getting started with HLS for Compute: Maxeler MaxCompiler, Xilinx Vivado HLS and Altera OpenCL SDK

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• Gordon Inggs (Imperial College)
• Monday 18 August 2014, 11:00-12:00
• Level 9 Mahanakorn Lab., EE Dept..

If you have a question about this talk, please contact Grigorios Mingas.

HLS toolflows have come a long way over the last few years, and in this talk I will use a simple example to illustrate this. I will take a tour through Maxeler’s MaxCompiler, Xilinx’s Vivado HLS and Altera’s OpenCL SDK , using the implementation of vector addition to show how now more than ever it is easy to do computation with FPG As. I will also comment on my recent experience of implementing more complex problems from computational finance on these three tools, and the implications for researchers in this area.

This talk is part of the CAS Talks series.

This talk is included in these lists:

• Andrea Picciau's list
• CAS Talks
• Circuits and Systems Group: Internal Seminars
• Level 9 Mahanakorn Lab., EE Dept.

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