Accelerating Non-Linear Support Vector Machine Training using FPGA

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• Mudhar Bin Rabieah (Imperial College)
• Monday 07 July 2014, 11:00-12:00
• Level 9 Mahanakorn Lab., EE Dept..

If you have a question about this talk, please contact Grigorios Mingas.

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Support Vector Machines (SVM) is a powerful learning method in machine learning. However, the training stage is still a time consuming problem. In this talk, a highly scalable FPGA architecture for accelerating the training phase of nonlinear SVMs is presented. In this architecture, the kernel function is split into fixed-point and floating point operations. This approach efficiently exploits FPGA ’s available resources. In addition, it maximizes the parallelization potential by customizing the fixed point operations to accommodate the different precision requirements for each attribute within the dataset. Block Rams are used to provide a high throughput access to the training points. In addition, a caching scheme is deployed to speedup the overall training process. Implementation results compare favourably with other software and GPU -based implementations.

This talk is part of the CAS Talks series.

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