Imperial College London > Talks@ee.imperial > CAS Talks > COMMSYN: On-Chip Communication Architecture Synthesis for Multi-Processor Systems-on-Chip

COMMSYN: On-Chip Communication Architecture Synthesis for Multi-Processor Systems-on-Chip

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Multiprocessor Systems-on-Chip (MPSoCs) are becoming ubiquitous in modern embedded systems for emerging convergence applications that demand high performance with low power/energy. The MPSoC’s on-chip communication critically impacts the overall system performance, power, cost and reliability. Consequently, the tasks of design, exploration and implementation of on-chip communication architectures have become some of the most time-consuming activities for system designers in a contemporary MPSoC design flow. The task of on-chip communication architecture design is further hampered by a lack of state-of-the-art system-level tools and methodologies to cope with their increasing complexity. This talk presents the COMMSYN framework for automated exploration and synthesis of on-chip communication architectures in emerging heterogeneous MPSoC applications. We have developed fast and accurate simulation and power estimation models for reliable on-chip communication architecture exploration early in the design flow. These models are used in our framework to make informed decisions during synthesis. COMMSYN enables a physical-implementation-aware and memory-architecture-aware on-chip communication architecture synthesis, comprehensively and automatically generating both the topology and protocol parameters, while trading off multiple design constraints such as power, performance, area and cost. Such a multi-faceted synthesis framework accrues many benefits for MPSoC designs such as improved design reliability and quality, better complexity management, reduced system cost and a faster time-to-market. The talk will also present experimental results on several industrial strength applications to demonstrate the utility of the automated and comprehensive synthesis framework for MPSoC designs. —Brief Biography—Nikil Dutt is a Chancellor’s Professor of CS and EECS at the University of California, Irvine. He received his PhD from the University of Illinois at Urbana-Champaign in 1989. His research interests are in embedded systems design automation, computer architecture, optimizing compilers, system specification techniques, and distributed embedded systems. He has received numerous best paper awards and is coauthor of 7 books. Professor Dutt served as Editor-in-Chief of ACM Transactions on Design Automation of Electronic Systems (TODAES) (2003-2008) and currently serves as Associate Editor of ACM Transactions on Embedded Computer Systems (TECS) and of IEEE Transactions on VLSI Systems (IEEE-TVLSI). He was an ACM SIGDA Distinguished Lecturer during 2001-2002, and an IEEE Computer Society Distinguished Visitor for 2003-2005. He has served on the steering, organizing, and program committees of several premier CAD and Embedded System Design conferences and workshops, and serves or has served on the advisory boards of ACM SIGBED and ACM SIGDA . Professor Dutt is a Fellow of the IEEE , an ACM Distinguished Scientist, and recipient of the IFIP Silver Core Award.

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