Online and Offline Precision Tuning in Hardware Accelerators

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• George A Constantinides (Imperial College)
• Monday 23 May 2022, 13:00-14:00
• Teams (in the "CAS Seminars" team).

If you have a question about this talk, please contact George A Constantinides.

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This is a talk I gave at SIAM PP22 on 25/02/22. I am repeating here for anyone interested from the local audience. Those who have heard He Li and Rocco Salvia talk may be familiar with the majority of technical content already.

In recent years, there has been considerable interest in application-specific or domain-specific hardware accelerators for computational kernels. The ability to define the hardware architecture to suit the numerical application at hand gives rise to considerable potential sources of energy and cost efficiency, including through the development of custom and mixed-precision arithmetics.

In this talk, I will summarise two of our recent research contributions in this space to highlight the possibilities. In one approach, we have developed a hardware accelerator using redundant number representations that customises the precision of its computation on-the-fly, computing in an ‘online’ manner; I will present some analysis of the convergence of such computations. In another approach, we have utilised recent developments in satisfiability modulo theories to estimate the probabilistic impact of low precision computation on small computational kernels suitable for a hardware accelerator.

I hope to end the talk with a summary of some of the key areas where I believe the NA community and the hardware accelerator community should prioritise working together over the next few years.

This talk is part of the CAS Talks series.

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