Imperial College London > Talks@ee.imperial > CAS Talks > FPGA Architecture Optimisation Using Geometric Programming

FPGA Architecture Optimisation Using Geometric Programming

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If you have a question about this talk, please contact George A Constantinides.

This talk will give an overview of Geometric Programming for the purpose of FPGA architecture development. We have developed a complete area and delay model that considers high-level architectural details about the device structure and low-level details such as transistor sizing. This talk will focus on the delay model, and show how you can use the the GP tool to derive inights about architectural details and also about traditional FPGA architecture design methods.

This talk is part of the CAS Talks series.

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