Imperial College London > Talks@ee.imperial > Control and Power Seminars > Algorithms and computer architectures for efficient real-time optimization and linear algebra solvers

Algorithms and computer architectures for efficient real-time optimization and linear algebra solvers

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If you have a question about this talk, please contact Eric C Kerrigan.

In many engineering applications where one would like to implement control and signal processing algorithms, one needs to use the latest measurements to update and solve a sequence of numerical optimization or linear algebra problems. Solving these problems in a computationally efficient and numerically reliable fashion on an embedded computing system is a challenging task.

One of the key choices that an engineer has to make in order to determine the speed, cost and power consumption of a microprocessor is the number representation that will be used in the arithmetic units. CPUs within modern desktop or laptop PCs provide hardware support for double precision floating-point arithmetic. However, most microprocessors in embedded systems do not support double precision floating-point arithmetic; they often only support single-precision floating-point and/or fixed-point arithmetic. It is therefore possible that, because of a significant decrease in precision or dynamic range, a numerical algorithm that gives reliable results on the office PC or laptop might give completely different results when implemented on an embedded computing system.

We will present novel mathematical formulations, computer architectures, optimization solvers and linear algebra solvers to show that computational resources can be reduced significantly using very low precision arithmetic, without sacrificing accuracy. We will also present new mathematical results that allow one to use fixed-point arithmetic to make impressive computational savings in iterative linear algebra solvers. Our theoretical results will be supported by implementations on a Field Programmable Gate Array (FPGA) and we will show that it is possible to exceed the peak theoretical performance of a 1TFLOP/s general-purpose GPU .

This talk is part of the Control and Power Seminars series.

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