Low-Voltage Analog Design based on the MOS Bulk Terminal

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• Dr Spiros Vlassis, University of Patras
• Friday 04 May 2012, 14:00-15:00
• Room 503, Level 5, EEE Dept. .

If you have a question about this talk, please contact Wiesia R Hsissen.

Reliability reasons of the modern nano-scale CMOS processes in addition with very critical digital specifications and low power consumption requires ultra low supplies with relatively high threshold voltages. The ultra low supply voltage, which in many cases is less than 0.5V, needs drastic changes in the analog circuit design and methodology. This talk will highlight the capabilities of MOS analog circuits in low supply environments using the bulk terminal. Circuit design methodologies will be presented which improve the intrinsic small bulk-transconductance, noise performance and input common-mode range. Based on this approach a new family of extremely circuits and systems has been emerged that are suitable for low power and low frequency applications such as biomedical electronics and sensor signal conditioning. Very interesting analog design tricks will demonstrate the way that we can use also MOS in week-inversion in MHz range applications such as IF filters and variable gain amplifiers.

This talk is part of the Featured talks series.

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• Andrea Picciau's list
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• COMMSP Seminar
• Featured talks
• Room 503, Level 5, EEE Dept.
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