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Optimization through GPGPUsAdd to your list(s) Download to your calendar using vCal
If you have a question about this talk, please contact George A Constantinides. General-Purpose GPUs offer a cheap and low-power solution to high-performance computing. In this talk, the use of GPGP Us to accelerate two optimization processes is presented. First, the case of accelerating legacy code for Electron Microscopy applications is addressed, focusing on the particular issues of the algorithms involved, as well as on the experience of moving from a classical programming paradigm towards the many-core paradigm. Second, preliminary results on the application of GPGP Us to perform fixed-point optimization of VLSI circuits are shown. Speedups around x100 are reported. Short bio: Gabriel Caffarena (MSc, University of Málaga, 1998; PhD, Universidad Politécnica de Madrid, 2008 – UPM Best Thesis Award) is an Associate Professor at University CEU San Pablo and a Researcher at the Laboratory of Bioengineering (http://biolab.uspceu.com/). His research is focused on FPGA /many-core acceleration and automatic circuit design. Since 2010 he is the Chair of the EURASIP Seminar on Hardware Design of DSP Systems. He was Lead Guest Editor of the Special Issue on “Quantization of VLSI DSP Systems” of the EURASIP J . on Advances in Signal Processing in 2010. He is author and co-author of 8 journal publications and more than 25 conference papers, covering the design of hardware/many-core accelerators (cryptography, bioinformatics, electron microscopy, etc.), the prototyping of wireless communication systems and the high-level synthesis and fixed-point optimization of VLSI circuits. He is Senior Member of IEEE and Member of EURASIP . This talk is part of the CAS Talks series. This talk is included in these lists:
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