FPGA architecture optimisation using geometric programming

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• Alastair Smith (Imperial College London)
• Thursday 22 January 2009, 12:00-13:00
• Level 9 Mahanakorn Lab., EE Dept..

If you have a question about this talk, please contact George A Constantinides.

The amenability of geometric programming to many digital circuit optimisation problems can provide designers with new and novel insights to the tradeoffs involved in designing complex SoCs. This talk will present two mathematical models describing different parts of an FPGA architecture and show how the models can be modified and combined into a geometric programming framework. The result of this is a tool that allows a designer to perform many complex tradeoffs across both the routing and logic architecture of a modern heterogeneous FPGA .

This talk is part of the CAS Talks series.

This talk is included in these lists:

• Andrea Picciau's list
• CAS Talks
• Circuits and Systems Group: Internal Seminars
• Level 9 Mahanakorn Lab., EE Dept.

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