Imperial College London > Talks@ee.imperial > CAS Talks > Accelerating Iterative Methods Using FPGAs

Accelerating Iterative Methods Using FPGAs

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If you have a question about this talk, please contact George A Constantinides.

This talk will discuss the quantification of how much different mantissa/exponent bit-widths impact FPGA resource utilization. We will look at how these data, in conjunction with acceptable error bounds in iterative methods, can be used to accelerate the solution of linear systems.

This talk is part of the CAS Talks series.

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