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Probabilistic Computing: A Case Study of Ripple Carry Adders

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Process Variation and Reliability has been a concern for designers, since the time of Von Neumann, However Moore’s law scaling has exposed today’s designers to atomic scale uncertainity. While macroscipic variation(PVT) is often correlated in nature, atomic scale variation is purely random. This is summarized by Pelgrom’s law which states the variation of sigma(Vt) is proportional to 1/sqrt(WL) even for identical matched transistor pair placed side-by-side. which translates to around 40% increase in variation for each technology step. Ultimate extrapolation of the above are futuristic computing paradigms such as single-elctron transistor or quantum cellular automata, which are probabilistic in nature.

Conventional techniques to contain variation such as worst case analysis is simple but very pessimistic. Recently industry has shifted it’s weight on SSTA which takes into account this purely random nature of variation. In this talk we discuss the performance of ripple carry adders frequently used in FPG As considering: the dynamic nature of input vectors as opposed to static, random variation in delay from stage to stage as in SSTA , and FAs with Probabilistic tables rather than truth tables. This is a preliminary investigation into the effect of variation on output SNR of the adder, and whether performace can be maintained under variation given a tolerable error limit at the output.

This talk is part of the CAS Talks series.

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