Imperial College London > Talks@ee.imperial > CAS Talks > Synthesis Without State Explosion -- from concurrent processes to netlists
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If you have a question about this talk, please contact George A Constantinides. This presentation will report on a recursive algorithm for digital circuit synthesis that substantially mitigates the so called state explosion problem. Starting from a readily intuitive process-style behavioral description and using Petri nets as an intermediate representation, we limit state enumeration to an adjustable constant cost bound throughout the transformation to the netlist form. Prior related work has depended on restrictive assumptions such as circuits conforming to free-choice Petri net models, but the proposed method is fully general. Attendees will also be treated to a whirlwind tour of delay insensitive circuit design and analysis sufficient for an understanding of this topic. keywords: Petri nets, direct mapping synthesis, delay insensitive This talk is part of the CAS Talks series. This talk is included in these lists:
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