From Custom CAD Tools to Circuit Reliability to IP Security: FPGA Research at BYU

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• Brent Nelson (Brigham Young University)
• Monday 15 October 2018, 16:00-17:00
• Level 9 Seminar Room, EEE Dept.

If you have a question about this talk, please contact George A Constantinides.

Research in the Configurable Computing Laboratory (CCL) at Brigham Young University (BYU) over the past decade has focused, in part, on physical design techniques and CAD tools for mapping designs onto FPGA devices. This is motivated by, and has enabled, research into CAD algorithms and CAD tool frameworks for rapid FPGA design such as RapidSmith and RapidSmith2. It has also supported work on the reliability of FPGA -based systems in harsh radiation environments and creating mitigation approaches against the effects of single-event upsets (SEU’s) on FPGA designs. And, it has supported work on security of IP in FPGA -based systems. This talk will describe our work in these areas, illustrating the uses of our research results, and pose questions for moving forward.

This talk is part of the CAS Talks series.

This talk is included in these lists:

• Andrea Picciau's list
• CAS Talks
• Circuits and Systems Group: Internal Seminars
• Level 9 Seminar Room, EEE Dept

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