A look into the Intel FPGA SDK for OpenCL

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• Joshua M Levine (Imperial College)
• Monday 12 December 2016, 15:00-16:00
• Level 9 Mahanakorn Lab., EEE Dept..

If you have a question about this talk, please contact George A Constantinides.

The Intel (formerly Altera) FPGA SDK for OpenCL is Intel’s High-Level Synthesis offering for accelerating computation on FPG As using a software-like development flow. In this seminar we will look into the inner workings of the framework, discussing some of the quirks and potential opportunities for development and research.

This talk is part of the CAS Talks series.

This talk is included in these lists:

• Andrea Picciau's list
• CAS Talks
• Circuits and Systems Group: Internal Seminars
• Level 9 Mahanakorn Lab., EEE Dept.

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