Imperial College London > Talks@ee.imperial > CAS Talks > "PEACH2: an FPGA switching fabric for high performance computing"

"PEACH2: an FPGA switching fabric for high performance computing"

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If you have a question about this talk, please contact Wiesia R Hsissen.

PEACH2 is an FPGA -accelerated fabric for connecting together multiple accelerators, such as GPUs, multi-core CPUs, and other FPG As. It removes the CPU as a scheduling and communication bottleneck, allowing ultra low latency direct communication between multiple accelerators over the intelligent FPGA -augmented interconnect.

We have demonstrated task-level pipelining on multiple accelerators with PEACH2 . By installing PEACH2 , typical high performance computation nodes are tightly coupled. In this environment, an application can be accelerated by exploiting not only data level parallelism, but also task level pipelined operation. Furthermore, we can process multiple tasks on multiple heterogeneous accelerators in a pipelined manner. In our demonstration, application achieves 44% speed up compared to a single GPU .

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