Imperial College London > Talks@ee.imperial > CAS Talks > A reliability-aware design methodology for embedded systems on multi-FPGA platforms
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A reliability-aware design methodology for embedded systems on multi-FPGA platformsAdd to your list(s) Download to your calendar using vCal
If you have a question about this talk, please contact George A Constantinides. In the last decades, SRAM -based Field Programmable Gate Arrays (FPGAs) have become an attractive technology for the electronics of embedded systems and they have been employed in many applicative domains. Their use is currently being investigated also for critical scenarios, where such devices can not be straightforwardly adopted due to their susceptibility to faults. This talk presents a methodology for the design of reliable systems on platforms composed of multiple SRAM -based FPG As. The idea is to achieve tolerance against both transient and permanent faults by exploiting the reconfigurable properties of the devices. The designed system is able to detect the occurrence of faults globally and autonomously, in order to recover or mitigate their effects, thus increasing both reliability and lifetime. The driving application scenario of the proposed work is constituted of embedded systems and applications for the space environment, where the reliability of the system is a strict requirement and its lifetime is a relevant aspect. This talk is part of the CAS Talks series. This talk is included in these lists:
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