Heterogeneous architecture exploration using analytical tools and VPR 5.0

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• Asma Kahoul (Imperial College)
• Thursday 23 July 2009, 12:00-13:00
• Room 611, EEE.

If you have a question about this talk, please contact George A Constantinides.

In previous talks I have presented the performance of analytical tools in exploring heterogeneous FPGA architectures. Our results showed a significant improvement over traditional parameter sweep methodologies. In this talk, we present a closed loop model which iteratively refines the ILP model using the place and route outputs from the VPR tool. This combined framework uses the efficiency of analytical tools and the accuracy of VPR to obtain efficient architectures within a specific time budget. Our results showed a further average improvement of 10% and a total improvement of 25% in comparison with the parameter sweep methodology.

This talk is part of the CAS Talks series.

This talk is included in these lists:

• Andrea Picciau's list
• CAS Talks
• Circuits and Systems Group: Internal Seminars
• Room 611, EEE

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