Circuit characterization towards high-level circuit design optimization

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• Rui Duarte (Imperial College)
• Tuesday 10 May 2011, 10:00-11:00
• Level 9 Mahanakorn Lab., EE Dept..

If you have a question about this talk, please contact Grigorios Mingas.

In this talk I’m going to address the results of low level characterization of reconfigurable devices towards system optimization. The information from these experiments will allow pushing the circuit performance further than traditional implementations. I’ll also present a work-in-progress case study where it’s expected to have a set of optimized designs taking ‘a priori’ information about the algorithm and about the device. Where an optimized design will be a trade of between area, mean error and working clock speed of a specific problem mapped into a specific device.

This talk is part of the CAS Talks series.

This talk is included in these lists:

• Andrea Picciau's list
• CAS Talks
• Circuits and Systems Group: Internal Seminars
• Level 9 Mahanakorn Lab., EE Dept.

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