Implementation of a Haar-like feature classifier based on an FPGA

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• Chuan Cheng (Imperial College London)
• Monday 07 February 2011, 11:30-12:00
• Level 9 Mahanakorn Lab., EE Dept..

If you have a question about this talk, please contact Grigorios Mingas.

This presentation is on introducing a new hardware implementation of Haar-like feature classifier based on an FPGA . Such classifiers are widely used for object detection in image processing. A well-known application of this classifier is the Viola-Jones face detector. This presentation will focus on the FPGA implementation of such a face detector. The main advantage of the new design is the significant reduction in routing complexity as well as an automatic workload distribution mechanism, which ensures all processing elements on the device are fully utilised all of the time.

This talk is part of the CAS Talks series.

This talk is included in these lists:

• Andrea Picciau's list
• CAS Talks
• Circuits and Systems Group: Internal Seminars
• Level 9 Mahanakorn Lab., EE Dept.

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